Layanan journal yang disediakan oleh Perpustakaan Universitas Gunadarma
| Judul Artikel | : | Design Guidelines for Reversed Nested Miller Compensation in Three-Stage Amplifiers |
|---|---|---|
| Judul Terbitan | : | IEEE Transactions On Circuits and Systems II : Analog and Digital Signal Processing |
| ISSN | : | 1057-7130 |
| Bahasa | : | ENG |
| Tempat Terbit | : | New-York |
| Tahun | : | 0000 |
| Volume | : | Vol. 50 Issue 5 0000 |
| Penerbit | : | IEEE |
| Frekuensi Penerbitan | : | |
| Penulis | : | Rosario Mita, Gaetano Palumbo, Salvatore Pennisi |
| Abstraksi | : | The reversed nested Miller compensation technique applied to a three-stage operational amplifier is discussed in this paper and new and simple design equations, accurately predicting the loop-gain phase margin, are developed. Techniques for parasitic positive-zero cancellation are also investigated and compared. For this purpose, we found that using nulling resistors is unpractical. Instead, exploiting only one follower (either a voltage or a current one) in the compensation branch results to be more appropriate. Indeed, not only does it avoid any additional constraint on stage transconductance, but it also overcomes the inherent limitations incurred by voltage and current followers when used to compensate two-stage amplifiers. Post-layout simulations on a CMOS opamp using the parameters of a 0.35-µm process are found to be in good agreement with the expected results. |
| Kata Kunci | : | Analog circuits; CMOS; frequency compensation; Nested Miller; OTA. |
| Lokasi | : | p. 227 |
| Terakreditasi | : | belum |