Layanan journal yang disediakan oleh Perpustakaan Universitas Gunadarma
| Judul Artikel | : | PERANCANGAN PAKET SINYAL PEMBANGKIT UPWM DAN SPWM UNTUK INVERTER SATU FASA BERBASIS FPGA |
|---|---|---|
| Judul Terbitan | : | TEKNOIN : Jurnal Teknik Industri |
| ISSN | : | 0583-8697 |
| Bahasa | : | IND |
| Tempat Terbit | : | Yogyakarta |
| Tahun | : | 0000 |
| Volume | : | Vol. 9 Issue 3 0000 |
| Penerbit | : | Fakultas Teknologi Industri Univeristas Islam Indonesia |
| Frekuensi Penerbitan | : | 4X per Tahun |
| Penulis | : | Tole Sutikno, Muchlas |
| Abstraksi | : | In many industrial applications, it is often required to control the output voltage and frequency. Regulating the output of an inverter using PWM is the most efficient way until now. Generating a PWM signal is one of the determining factors for overall system performance. Designing a PWM signal generator using FPGA has several advantages, such as: it's quick, very modifiable, and very suitable for protohyping. In this design, FPGA Xilinx 4013 is used. The basic principle of programming or configuring this FPGA are converting from a schematic diagram for a digital electronic circuit draw in OrCAD to a bit stream file, and downloading this file into FPGA Xilinx IC, so the IC is configured in a similar configuration with the circuit configuration drawn in OrCAD. This research builds a FPGA based UPWM and SPWM signal generator for 1-phase regulator inverter. This research proofs that the UPWM and SPWM signal generator designed work properly during simulation. The implementation of design in FPGA XC4013 chip occupies 552 CLBs, which is 96% from available CLBs. Implementation result proofs that the circuit works properly. The circuit has the capability to generate UPWM and SPWM signal with adjustable modulation index and frequency yields. |
| Kata Kunci | : | Inverter PWM; UPWM; SPWM; OrCAD; FPGA |
| Lokasi | : | p. 217 |
| Terakreditasi | : | belum |